Enumerated types for UART driver.
More...
|
| enum | uart_status_en {
UART_OK
,
UART_ERROR
,
UART_ERROR_BUSY
,
UART_ERROR_TIMEOUT
,
UART_ERROR_UNSUPPORTED
,
UART_ERROR_PARAMETER
,
UART_ERROR_TX_UNDERFLOW
,
UART_ERROR_RX_OVERFLOW
,
UART_ERROR_RX_BREAK_DETECTED
,
UART_ERROR_BAUDRATE
,
UART_ERROR_NOT_INITIALIZED
,
UART_ERROR_RX_BUSY
,
UART_ERROR_TX_BUSY
,
UART_ERROR_TX_TIMEOUT
,
UART_ERROR_RX_TIMEOUT
,
UART_ERROR_FRAMING
,
UART_ERROR_PARITY
,
UART_ERROR_DATA_BITS
,
UART_ERROR_STOP_BITS
,
UART_ERROR_INSTANCE
,
UART_ERROR_FLOW_CONTROL
,
UART_ERROR_INTERRUPT_MODE
} |
| | UART driver status and error codes. More...
|
| |
| enum | uart_cb_param_en {
UART_SUCCESS
,
UART_RX_TIMEOUT
,
UART_BUSY
,
UART_TX_DATA_NOT_READY
,
UART_RX_DATA_NOT_READY
,
UART_RX_BREAK
,
UART_RX_FRAMING_ERROR
,
UART_RX_PARITY_ERROR
,
UART_RX_OVERRUN_ERROR
,
UART_ABORT_TRANSFER
,
UART_UNKNOWN_ERROR
} |
| | UART driver hardware and software events. More...
|
| |
| enum | uart_char_len_en {
UART_CHAR_LEN_FIVE = 0x05
,
UART_CHAR_LEN_SIX = 0x06
,
UART_CHAR_LEN_SEVEN = 0x07
,
UART_CHAR_LEN_EIGHT = 0x08
} |
| | UART character length configuration (data bits). More...
|
| |
| enum | uart_stop_bits_en {
UART_STOP_BITS_ONE
,
UART_STOP_BITS_ONE_FIVE
,
UART_STOP_BITS_TWO
} |
| | Stop bits configuration. More...
|
| |
| enum | uart_parity_en {
UART_PARITY_NONE
,
UART_PARITY_EVEN
,
UART_PARITY_ODD
} |
| | UART parity configuration. More...
|
| |
| enum | uart_int_mask_en {
UART_RX_INT = (1U << 0)
,
UART_TX_INT = (1U << 1)
,
UART_ERROR_INT = (1U << 2)
,
UART_MODEM_INT = (1U << 3)
} |
| | UART interrupt sources. More...
|
| |
| enum | uart_tx_fifo_trigger_en {
UART_TX_FIFO_EMPTY = 0x00
,
UART_TX_FIFO_TWO = 0x01
,
UART_TX_FIFO_QUARTER = 0x02
,
UART_TX_FIFO_HALF = 0x03
} |
| | UART TX FIFO trigger level. More...
|
| |
| enum | uart_rx_fifo_trigger_en {
UART_RX_FIFO_ONE = 0x00
,
UART_RX_FIFO_QUARTER = 0x01
,
UART_RX_FIFO_HALF = 0x02
,
UART_RX_FIFO_TWO = 0x03
} |
| | UART RX FIFO trigger level. More...
|
| |
| enum | uart_int_id_en {
IIR_IID_UART_MODEM_STATUS = 0x0
,
IIR_IID_NO_INTERRUPT_PENDING = 0x1
,
IIR_IID_THR_EMPTY = 0x2
,
IIR_IID_RECEIVED_DATA_AVAILABLE = 0x4
,
IIR_IID_RECEIVER_LINE_STATUS = 0x6
,
IIR_IID_BUSY_DETECT = 0x7
,
IIR_IID_CHARACTER_TIMEOUT = 0xC
} |
| | UART interrupt ID types from IIR register. More...
|
| |
| enum | uart_put_status_en {
TX_IN_PROGRESS
,
TX_COMPLETE
,
TX_ERROR
} |
| | UART transmission status. More...
|
| |
| enum | uart_get_status_en {
RX_IN_PROGRESS
,
RX_COMPLETE
,
RX_ERROR
} |
| | UART reception status. More...
|
| |
Enumerated types for UART driver.
◆ uart_status_en
UART driver status and error codes.
This enumeration defines various return and error codes used by the UART driver to indicate operation success, failure, and specific error conditions.
| Enumerator |
|---|
| UART_OK | Operation succeeded
|
| UART_ERROR | Unspecified error
|
| UART_ERROR_BUSY | Driver is busy
|
| UART_ERROR_TIMEOUT | Timeout occurred
|
| UART_ERROR_UNSUPPORTED | Operation not supported
|
| UART_ERROR_PARAMETER | Parameter error
|
| UART_ERROR_TX_UNDERFLOW | Transmit data underflow detected
|
| UART_ERROR_RX_OVERFLOW | Receive data overflow detected
|
| UART_ERROR_RX_BREAK_DETECTED | Break detected on receive
|
| UART_ERROR_BAUDRATE | Baudrate is not supported with current clock source
|
| UART_ERROR_NOT_INITIALIZED | Device instance was not initialized
|
| UART_ERROR_RX_BUSY | Receiver busy error
|
| UART_ERROR_TX_BUSY | Transmitter busy error
|
| UART_ERROR_TX_TIMEOUT | Transmitter timeout error
|
| UART_ERROR_RX_TIMEOUT | Receiver timeout error
|
| UART_ERROR_FRAMING | UART framing error
|
| UART_ERROR_PARITY | Specified parity not supported
|
| UART_ERROR_DATA_BITS | Specified number of data bits not supported
|
| UART_ERROR_STOP_BITS | Specified number of stop bits not supported
|
| UART_ERROR_INSTANCE | UART instance is not valid
|
| UART_ERROR_FLOW_CONTROL | Specified flow control not supported
|
| UART_ERROR_INTERRUPT_MODE | Interrupt mode not supported
|
◆ uart_cb_param_en
UART driver hardware and software events.
This enumeration defines various events that can be passed to the UART callback function to indicate status changes or errors.
| Enumerator |
|---|
| UART_SUCCESS | TX/RX successfully completed
|
| UART_RX_TIMEOUT | Receive character timeout
|
| UART_BUSY | Illegal operation while device is busy
|
| UART_TX_DATA_NOT_READY | Tx FIFO interrupt occurred but data below level bit
|
| UART_RX_DATA_NOT_READY | Rx FIFO interrupt occurred but data ready bit
|
| UART_RX_BREAK | Break detected on receive
|
| UART_RX_FRAMING_ERROR | Framing error detected on receive
|
| UART_RX_PARITY_ERROR | Parity error detected on receive
|
| UART_RX_OVERRUN_ERROR | Overrun error detected
|
| UART_ABORT_TRANSFER | Abort UART_Transfer
|
| UART_UNKNOWN_ERROR | Unknown error
|
◆ uart_char_len_en
UART character length configuration (data bits).
This enumeration defines the number of data bits per character used in UART transmission and reception.
| Enumerator |
|---|
| UART_CHAR_LEN_FIVE | 5 data bits
|
| UART_CHAR_LEN_SIX | 6 data bits
|
| UART_CHAR_LEN_SEVEN | 7 data bits
|
| UART_CHAR_LEN_EIGHT | 8 data bits
|
◆ uart_stop_bits_en
Stop bits configuration.
This enumeration defines the number of stop bits used in UART communication.
| Enumerator |
|---|
| UART_STOP_BITS_ONE | 1 Stop bit (default)
|
| UART_STOP_BITS_ONE_FIVE | 1.5 Stop bits
|
| UART_STOP_BITS_TWO | 2 Stop bits
|
◆ uart_parity_en
UART parity configuration.
This enumeration specifies the parity mode used in UART communication.
| Enumerator |
|---|
| UART_PARITY_NONE | No Parity (default)
|
| UART_PARITY_EVEN | Even Parity
|
| UART_PARITY_ODD | Odd Parity
|
◆ uart_int_mask_en
UART interrupt sources.
These values represent individual UART interrupt enable bits. They can be combined using bitwise OR to enable multiple interrupts. They can be disabled by using ~ operator. Eg: ~UART_RX_INT
| Enumerator |
|---|
| UART_RX_INT | UART interrupt: Received Data Available.
|
| UART_TX_INT | UART interrupt: Transmit Holding Register Empty.
|
| UART_ERROR_INT | UART interrupt: Receiver Line Status.
|
| UART_MODEM_INT | UART interrupt: Modem Status.
|
◆ uart_tx_fifo_trigger_en
UART TX FIFO trigger level.
This enumeration defines the trigger levels for TX FIFO interrupts.
| Enumerator |
|---|
| UART_TX_FIFO_EMPTY | TX FIFO is empty
|
| UART_TX_FIFO_TWO | TX FIFO trigger level is 2 bytes
|
| UART_TX_FIFO_QUARTER | TX FIFO trigger level is 1/4 full
|
| UART_TX_FIFO_HALF | TX FIFO trigger level is 1/2 full
|
◆ uart_rx_fifo_trigger_en
UART RX FIFO trigger level.
This enumeration defines the trigger levels for RX FIFO interrupts.
| Enumerator |
|---|
| UART_RX_FIFO_ONE | RX FIFO trigger level is 1 byte
|
| UART_RX_FIFO_QUARTER | RX FIFO trigger level is 1/4 full
|
| UART_RX_FIFO_HALF | RX FIFO trigger level is 1/2 full
|
| UART_RX_FIFO_TWO | RX FIFO trigger level is 2 bytes
|
◆ uart_int_id_en
UART interrupt ID types from IIR register.
This enumeration defines possible interrupt identification values read from the IIR register.
| Enumerator |
|---|
| IIR_IID_UART_MODEM_STATUS | Modem status interrupt
|
| IIR_IID_NO_INTERRUPT_PENDING | No interrupt is pending
|
| IIR_IID_THR_EMPTY | Transmit holding register empty
|
| IIR_IID_RECEIVED_DATA_AVAILABLE | Received data available
|
| IIR_IID_RECEIVER_LINE_STATUS | Receiver line status
|
| IIR_IID_BUSY_DETECT | Busy detect
|
| IIR_IID_CHARACTER_TIMEOUT | Character timeout
|
◆ uart_put_status_en
UART transmission status.
Indicates the current status of a UART transmission.
| Enumerator |
|---|
| TX_IN_PROGRESS | Transmission is ongoing
|
| TX_COMPLETE | Transmission is complete
|
| TX_ERROR | Transmission error occurred
|
◆ uart_get_status_en
UART reception status.
Indicates the current status of a UART reception.
| Enumerator |
|---|
| RX_IN_PROGRESS | Reception is ongoing
|
| RX_COMPLETE | Reception is complete
|
| RX_ERROR | Reception error occurred
|