Macro Definitions for SDIO Driver. More...

Macros
#define	SDIO_BLOCK_SIZE (512UL)

#define	SDIO_SDSC_ADDR_SHIFT (9U)

#define	SDIO_CLK_400K (400UL * 1000UL)

#define	SDIO_CLK_10M (10UL * 1000UL * 1000UL)

#define	SDIO_CLK_20M (20UL * 1000UL * 1000UL)

#define	SDIO_CLK_25M (25UL * 1000UL * 1000UL)

#define	SDIO_CLK_50M (50UL * 1000UL * 1000UL)

#define	SDIO_CLK_100M (100UL * 1000UL * 1000UL)

#define	SDIO_CLK_RAMP_UP_TIME_MS (100UL)

#define	SDIO_CLK_RAMP_UP_TIME_US_WAKEUP (1U)

#define	SDIO_INIT_CLK_FREQUENCY_KHZ (400U)

#define	SDIO_3_PERIODS_US (((1000U * 3U) / SDIO_INIT_CLK_FREQUENCY_KHZ) + 1U)

#define	SDIO_CARD_IDLE (0x0UL)

#define	SDIO_CARD_READY (0x1UL)

#define	SDIO_CARD_IDENT (0x2UL)

#define	SDIO_CARD_STBY (0x3UL)

#define	SDIO_CARD_TRAN (0x4UL)

#define	SDIO_CARD_DATA (0x5UL)

#define	SDIO_CARD_RCV (0x6UL)

#define	SDIO_CARD_PRG (0x7UL)

#define	SDIO_CARD_DIS (0x8UL)

#define	SDIO_CMD13_OUT_OF_RANGE (31U)

#define	SDIO_CMD13_ADDRESS_ERROR (30U)

#define	SDIO_CMD13_BLOCK_LEN_ERROR (29U)

#define	SDIO_CMD13_ERASE_SEQ_ERROR (28U)

#define	SDIO_CMD13_ERASE_PARAM (27U)

#define	SDIO_CMD13_WP_VIOLATION (26U)

#define	SDIO_CMD13_CARD_IS_LOCKED (25U)

#define	SDIO_CMD13_LOCK_ULOCK_FAILED (24U)

#define	SDIO_CMD13_COM_CRC_ERROR (23U)

#define	SDIO_CMD13_ILLEGAL_COMMAND (22U)

#define	SDIO_CMD13_CARD_ECC_FAILED (21U)

#define	SDIO_CMD13_CC_ERROR (20U)

#define	SDIO_CMD13_ERROR (19U)

#define	SDIO_CMD13_CSD_OVERWRITE (16U)

#define	SDIO_CMD13_WP_ERASE_SKIP (15U)

#define	SDIO_CMD13_CARD_ECC_DISABLED (14U)

#define	SDIO_CMD13_CURRENT_STATE (9U)

#define	SDIO_CMD13_READY_FOR_DATA (8U)

#define	SDIO_CMD13_APP_CMD (5U)

#define	SDIO_CMD13_AKE_SEQ_ERROR (3U)

#define	SDIO_CMD13_CURRENT_STATE_MSK (0x00001E00UL)

#define	SDIO_CMD_COMPLETE (0x0001U)

#define	SDIO_XFER_COMPLETE (0x0002U)

#define	SDIO_BGAP (0x0004U)

#define	SDIO_DMA_INTERRUPT (0x0008U)

#define	SDIO_BUF_WR_READY (0x0010U)

#define	SDIO_BUF_RD_READY (0x0020U)

#define	SDIO_CARD_INSERTION (0x0040U)

#define	SDIO_CARD_REMOVAL (0x0080U)

#define	SDIO_CARD_INTERRUPT (0x0100U)

#define	SDIO_FX_EVENT (0x2000U)

#define	SDIO_ERR_INTERRUPT (0x8000U)

#define	SDIO_CUR_LMT_ERR (0x0080U)

#define	SDIO_ADMA_ERR (0x0200U)

#define	SDIO_TUNING_ERR (0x0400U)

#define	SDIO_DAT_7_4 (0x000000F0UL)

#define	SDIO_BUF_WR_ENABLE (0x00000400UL)

#define	SDIO_BUF_RD_ENABLE (0x00000800UL)

#define	SDIO_CARD_INSERTED (0x00010000UL)

#define	SDIO_CARD_STABLE (0x00020000UL)

#define	SDIO_CARD_DETECT_PIN_LEVEL (0x00040000UL)

#define	SDIO_WR_PROTECT_SW_LVL (0x00080000UL)

#define	SDIO_DAT_3_0 (0x00F00000UL)

#define	SDIO_DAT_0_Msk (0x00100000UL)

#define	SDIO_CMD_LINE_LVL (0x01000000UL)

#define	SDIO_HOST_REG_VOL (0x02000000UL)

#define	SDIO_CMD_ISSU_ERR (0x08000000UL)

#define	SDIO_SUB_CMD_STAT (0x10000000UL)

Detailed Description

Macro Definitions for SDIO Driver.

Macro Definition Documentation

◆ SDIO_BLOCK_SIZE

#define SDIO_BLOCK_SIZE (512UL)

The SD memory card block size.

◆ SDIO_SDSC_ADDR_SHIFT

#define SDIO_SDSC_ADDR_SHIFT (9U)

This constant is used to get the address for the SDSC card using the shift operation instead of multiply to 512.

◆ SDIO_CLK_400K

#define SDIO_CLK_400K (400UL * 1000UL)

Clk = 400 kHz.

◆ SDIO_CLK_10M

#define SDIO_CLK_10M (10UL * 1000UL * 1000UL)

Clk = 10 MHz.

◆ SDIO_CLK_20M

#define SDIO_CLK_20M (20UL * 1000UL * 1000UL)

Clk = 20 MHz.

◆ SDIO_CLK_25M

#define SDIO_CLK_25M (25UL * 1000UL * 1000UL)

Clk = 25 MHz.

◆ SDIO_CLK_50M

#define SDIO_CLK_50M (50UL * 1000UL * 1000UL)

Clk = 50 MHz.

◆ SDIO_CLK_100M

#define SDIO_CLK_100M (100UL * 1000UL * 1000UL)

Clk = 100 MHz.

◆ SDIO_CLK_RAMP_UP_TIME_MS

#define SDIO_CLK_RAMP_UP_TIME_MS (100UL)

The host power ramp up time. Define of the SDIO_CLK_RAMP_UP_TIME_US_WAKEUP suppresses SDIO_CLK_RAMP_UP_TIME_MS_WAKEUP This is legacy constant. It is left here just for backward compatibility. Do not use it in new designs.

◆ SDIO_CLK_RAMP_UP_TIME_US_WAKEUP

#define SDIO_CLK_RAMP_UP_TIME_US_WAKEUP (1U)

The default host power ramp up time during wake up from deep sleep.

◆ SDIO_INIT_CLK_FREQUENCY_KHZ

#define SDIO_INIT_CLK_FREQUENCY_KHZ (400U)

The CLK frequency in kHz during card initialization

◆ SDIO_CARD_IDLE

#define SDIO_CARD_IDLE (0x0UL)

The card idle state.

◆ SDIO_CARD_READY

#define SDIO_CARD_READY (0x1UL)

The card ready state.

◆ SDIO_CARD_IDENT

#define SDIO_CARD_IDENT (0x2UL)

The card identification state.

◆ SDIO_CARD_STBY

#define SDIO_CARD_STBY (0x3UL)

The card stand-by state.

◆ SDIO_CARD_TRAN

#define SDIO_CARD_TRAN (0x4UL)

The card transition state.

◆ SDIO_CARD_DATA

#define SDIO_CARD_DATA (0x5UL)

The card sending-data state.

◆ SDIO_CARD_RCV

#define SDIO_CARD_RCV (0x6UL)

The card receive-data state.

◆ SDIO_CARD_PRG

#define SDIO_CARD_PRG (0x7UL)

The card programming state.

◆ SDIO_CARD_DIS

#define SDIO_CARD_DIS (0x8UL)

The card disconnect state.

◆ SDIO_CMD13_OUT_OF_RANGE

#define SDIO_CMD13_OUT_OF_RANGE (31U)

The command's argument is out of range.

◆ SDIO_CMD13_ADDRESS_ERROR

#define SDIO_CMD13_ADDRESS_ERROR (30U)

The address does not match the block length.

◆ SDIO_CMD13_BLOCK_LEN_ERROR

#define SDIO_CMD13_BLOCK_LEN_ERROR (29U)

The block length is not allowed for this card.

◆ SDIO_CMD13_ERASE_SEQ_ERROR

#define SDIO_CMD13_ERASE_SEQ_ERROR (28U)

An error in the sequence of erase commands occurred.

◆ SDIO_CMD13_ERASE_PARAM

#define SDIO_CMD13_ERASE_PARAM (27U)

An invalid selection of write blocks for erase occurred.

◆ SDIO_CMD13_WP_VIOLATION

#define SDIO_CMD13_WP_VIOLATION (26U)

The host attempts to write to a protected block or to the permanent write-protected card.

◆ SDIO_CMD13_CARD_IS_LOCKED

#define SDIO_CMD13_CARD_IS_LOCKED (25U)

The card is locked by the host.

◆ SDIO_CMD13_LOCK_ULOCK_FAILED

#define SDIO_CMD13_LOCK_ULOCK_FAILED (24U)

A sequence or password error occurred has been detected in the lock/unlock card command.

◆ SDIO_CMD13_COM_CRC_ERROR

#define SDIO_CMD13_COM_CRC_ERROR (23U)

The CRC of the previous command failed.

◆ SDIO_CMD13_ILLEGAL_COMMAND

#define SDIO_CMD13_ILLEGAL_COMMAND (22U)

The command is not legal for the card state.

◆ SDIO_CMD13_CARD_ECC_FAILED

#define SDIO_CMD13_CARD_ECC_FAILED (21U)

The card internal ECC failed.

◆ SDIO_CMD13_CC_ERROR

#define SDIO_CMD13_CC_ERROR (20U)

An internal card-controller error.

◆ SDIO_CMD13_ERROR

#define SDIO_CMD13_ERROR (19U)

A general or unknown error occurred.

◆ SDIO_CMD13_CSD_OVERWRITE

#define SDIO_CMD13_CSD_OVERWRITE (16U)

Can be either one of the following errors:

The read only section of the CSD does not match the card content.
An attempt to reverse the copy (set as original) or permanent WP (unprotected) bits was made.

◆ SDIO_CMD13_WP_ERASE_SKIP

#define SDIO_CMD13_WP_ERASE_SKIP (15U)

Set when only partial address space was erased due to existing write protected blocks or a temporary or permanent write protected card was erased.

◆ SDIO_CMD13_CARD_ECC_DISABLED

#define SDIO_CMD13_CARD_ECC_DISABLED (14U)

The command has been executed without using the internal ECC.

◆ SDIO_CMD13_CURRENT_STATE

#define SDIO_CMD13_CURRENT_STATE (9U)

The state of the card.

◆ SDIO_CMD13_READY_FOR_DATA

#define SDIO_CMD13_READY_FOR_DATA (8U)

The buffer is empty on the bus.

◆ SDIO_CMD13_APP_CMD

#define SDIO_CMD13_APP_CMD (5U)

The card will expect ACMD, or an indication that the command has been interpreted as ACMD.

◆ SDIO_CMD13_AKE_SEQ_ERROR

#define SDIO_CMD13_AKE_SEQ_ERROR (3U)

Error in the sequence of the authentication process.

◆ SDIO_CMD13_CURRENT_STATE_MSK

#define SDIO_CMD13_CURRENT_STATE_MSK (0x00001E00UL)

The current state mask of the card.

◆ SDIO_CMD_COMPLETE

#define SDIO_CMD_COMPLETE (0x0001U)

Command complete. In SD mode, this event is set after detecting the end bit of a response except for Auto CMD12 and Auto CMD23. This event is not generated when the Response Interrupt is disabled.

◆ SDIO_XFER_COMPLETE

#define SDIO_XFER_COMPLETE (0x0002U)

Transfer complete. This event is set when a read/write transfer and a command with the Busy Status are completed.

◆ SDIO_BGAP

#define SDIO_BGAP (0x0004U)

Block gap. This event is set when both read/write transactions are stopped at the block gap due to a Stop-at-Block-Gap Request.

◆ SDIO_DMA_INTERRUPT

#define SDIO_DMA_INTERRUPT (0x0008U)

DMA Interrupt. This event is set if the Host Controller detects a SDMA Buffer Boundary during a transfer. For ADMA, the Host controller generates this interrupt by setting the Int field in the descriptor table. This interrupt is not generated after a Transfer Complete.

◆ SDIO_BUF_WR_READY

#define SDIO_BUF_WR_READY (0x0010U)

The Buffer Write is ready. This event is set if the Buffer Write Enable changes from 0 to 1.

◆ SDIO_BUF_RD_READY

#define SDIO_BUF_RD_READY (0x0020U)

The Buffer Read is ready. This event is set if the Buffer Read Enable changes from 0 to 1.

◆ SDIO_CARD_INSERTION

#define SDIO_CARD_INSERTION (0x0040U)

Card insertion. This event is set if the Card Inserted in the Present State register changes from 0 to 1.

◆ SDIO_CARD_REMOVAL

#define SDIO_CARD_REMOVAL (0x0080U)

Card removal. This event is set if the Card Inserted in the Present State register changes from 1 to 0.

◆ SDIO_CARD_INTERRUPT

#define SDIO_CARD_INTERRUPT (0x0100U)

The Card interrupt. This event reflects the synchronized value of DAT[1] Interrupt Input for SD Mode

◆ SDIO_FX_EVENT

#define SDIO_FX_EVENT (0x2000U)

FX event. This status is set when R[14] of the response register is set to 1 and Response Type R1/R5 is set to 0 in the Transfer Mode register. This interrupt is used with the response check function.

◆ SDIO_ERR_INTERRUPT

#define SDIO_ERR_INTERRUPT (0x8000U)

Error Interrupt. If any of the bits in the Error Interrupt Status register are set, then this bit is set.

◆ SDIO_CUR_LMT_ERR

#define SDIO_CUR_LMT_ERR (0x0080U)

Current Limit error. The SD Host driver does not support this function, this bit is always set to 0.

◆ SDIO_ADMA_ERR

#define SDIO_ADMA_ERR (0x0200U)

ADMA error. This bit is set when the Host Controller detects an error during an ADMA-based data transfer. The possible reasons for an error:

An error response is received from the System bus;
ADMA2 Descriptors are invalid;
CQE Task or Transfer descriptors are invalid. When an error occurs, the state of the ADMA is saved in the ADMA Error Status register.

◆ SDIO_TUNING_ERR

#define SDIO_TUNING_ERR (0x0400U)

Tuning error. The SD Host driver does not support this function.

◆ SDIO_DAT_7_4

#define SDIO_DAT_7_4 (0x000000F0UL)

DAT[7:4] Line Signal Level. These bits are used to check the DAT line level to recover from errors and for debugging. These bits reflect the value of the sd_dat_in (upper nibble) signal.

◆ SDIO_BUF_WR_ENABLE

#define SDIO_BUF_WR_ENABLE (0x00000400UL)

Buffer Write Enable. This bit is used for non-DMA transfers. This bit is set if space is available for writing data.

◆ SDIO_BUF_RD_ENABLE

#define SDIO_BUF_RD_ENABLE (0x00000800UL)

Buffer Read Enable. This bit is used for non-DMA transfers. This bit is set if valid data exists in the Host buffer.

◆ SDIO_CARD_INSERTED

#define SDIO_CARD_INSERTED (0x00010000UL)

Card Inserted. This bit indicates whether a card has been inserted. The Host Controller debounces this signal so that the Host Driver does not need to wait for the signal to stabilize.

◆ SDIO_CARD_STABLE

#define SDIO_CARD_STABLE (0x00020000UL)

Card Stable. This bit indicates the stability of the Card Detect Pin Level. A card is not detected if this bit is set to 1 and the value of the CARD_INSERTED bit is 0.

◆ SDIO_CARD_DETECT_PIN_LEVEL

#define SDIO_CARD_DETECT_PIN_LEVEL (0x00040000UL)

Card Detect Pin Level. This bit reflects the inverse synchronized value of the card_detect_n signal.

◆ SDIO_WR_PROTECT_SW_LVL

#define SDIO_WR_PROTECT_SW_LVL (0x00080000UL)

Write Protect Switch Pin Level. This bit is supported only for memory and combo cards. This bit reflects the synchronized value of the card_write_prot signal.

◆ SDIO_DAT_3_0

#define SDIO_DAT_3_0 (0x00F00000UL)

DAT[3:0] Line Signal Level. This bit is used to check the DAT line level to recover from errors and for debugging. These bits reflect the value of the sd_dat_in (lower nibble) signal.

◆ SDIO_DAT_0_Msk

#define SDIO_DAT_0_Msk (0x00100000UL)

DAT[0] Line Signal Level. This bit is used to check the DAT0 line level to check R1b response. This bit reflects the value of the sd_dat_in[0] signal.

◆ SDIO_CMD_LINE_LVL

#define SDIO_CMD_LINE_LVL (0x01000000UL)

Command-Line Signal Level. This bit is used to check the CMD line level to recover from errors and for debugging. These bits reflect the value of the sd_cmd_in signal.

◆ SDIO_HOST_REG_VOL

#define SDIO_HOST_REG_VOL (0x02000000UL)

Host Regulator Voltage Stable. This bit is used to check whether the host regulator voltage is stable for switching the voltage of UHS-I mode. This bit reflects the synchronized value of the host_reg_vol_stable signal.

◆ SDIO_CMD_ISSU_ERR

#define SDIO_CMD_ISSU_ERR (0x08000000UL)

Command Not Issued by Error. This bit is set if a command cannot be issued after setting the command register due to an error except an Auto CMD12 error.

◆ SDIO_SUB_CMD_STAT

#define SDIO_SUB_CMD_STAT (0x10000000UL)

Sub Command Status. This bit is used to distinguish between a main command and a sub command status.

Macros