Combined UART USR (Status Register) and LSR (Line Status Register) bitfield. More...

#include <uart.h>

Data Fields
uint16_t	busy_not_used: 1

uint16_t	tx_fifo_not_full: 1

uint16_t	tx_fifo_empty: 1

uint16_t	rx_fifo_not_empty: 1

uint16_t	rx_fifo_full: 1

uint16_t	reserved_5: 1

uint16_t	reserved_6: 1

uint16_t	reserved_7: 1

uint16_t	data_ready: 1

uint16_t	overrun_error: 1

uint16_t	parity_error: 1

uint16_t	framing_error: 1

uint16_t	break_detected: 1

uint16_t	thr_empty: 1

uint16_t	tx_empty: 1

uint16_t	rx_fifo_error: 1

Detailed Description

Combined UART USR (Status Register) and LSR (Line Status Register) bitfield.

This bitfield structure represents the combined 16-bit value of the UART status.

Bits [0–7] : USR (UART Status Register)
Bits [8–15]: LSR (Line Status Register)

Field Documentation

◆ busy_not_used

uint16_t uart_usr_lsr_status_bits_t::busy_not_used

Bit 0: UART is busy (not used on SR110)

◆ tx_fifo_not_full

uint16_t uart_usr_lsr_status_bits_t::tx_fifo_not_full

Bit 1: TFNF - Transmit FIFO Not Full

◆ tx_fifo_empty

uint16_t uart_usr_lsr_status_bits_t::tx_fifo_empty

Bit 2: TFE - Transmit FIFO Empty

◆ rx_fifo_not_empty

uint16_t uart_usr_lsr_status_bits_t::rx_fifo_not_empty

Bit 3: RFNE - Receive FIFO Not Empty

◆ rx_fifo_full

uint16_t uart_usr_lsr_status_bits_t::rx_fifo_full

Bit 4: RFF - Receive FIFO Full

◆ reserved_5

uint16_t uart_usr_lsr_status_bits_t::reserved_5

Bit 5: Reserved

◆ reserved_6

uint16_t uart_usr_lsr_status_bits_t::reserved_6

Bit 6: Reserved

◆ reserved_7

uint16_t uart_usr_lsr_status_bits_t::reserved_7

Bit 7: Reserved

◆ data_ready

uint16_t uart_usr_lsr_status_bits_t::data_ready

Bit 8: DR - Data Ready

◆ overrun_error

uint16_t uart_usr_lsr_status_bits_t::overrun_error

Bit 9: OE - Overrun Error

◆ parity_error

uint16_t uart_usr_lsr_status_bits_t::parity_error

Bit 10: PE - Parity Error

◆ framing_error

uint16_t uart_usr_lsr_status_bits_t::framing_error

Bit 11: FE - Framing Error

◆ break_detected

uint16_t uart_usr_lsr_status_bits_t::break_detected

Bit 12: BI - Break Interrupt Detected

◆ thr_empty

uint16_t uart_usr_lsr_status_bits_t::thr_empty

Bit 13: THRE - Transmit Holding Register Empty

◆ tx_empty

uint16_t uart_usr_lsr_status_bits_t::tx_empty

Bit 14: TEMT - Transmitter Empty

◆ rx_fifo_error

uint16_t uart_usr_lsr_status_bits_t::rx_fifo_error

Bit 15: RFE - Receive FIFO Error

Data Fields